buffer storage
英 [ˈbʌfə(r) ˈstɔːrɪdʒ]
美 [ˈbʌfər ˈstɔːrɪdʒ]
缓冲存储；缓冲存储器
英英释义
noun
- (computer science) a part of RAM used for temporary storage of data that is waiting to be sent to a device
双语例句
- An intermediate buffer being between high speed buffer and main storage, i.e, using two levels of buffer to speed up the access of memory system.
在高速缓存和主存储器之间的一种中间存储器，即利用两级缓存来提高存储系统的存取速度。 - ARP Protocol points to the address mapping of Media Access Control. There is an error in ARP high-speed buffer storage. IP data package may be sent to wrong computer.
ARP协议指向媒体访问控制的地址映射，ARP高速缓存中有一项不正确，IP数据报就可能被发往错误的计算机。 - A buffer pool is an area of storage in memory into which database pages ( containing table rows or index entries) are temporarily read and changed.
缓冲池是内存中的一块存储区域，用于临时读入和更改数据库页（包含表行或索引项）。 - Note that you can use the sync command to flush the buffer cache out to the storage media ( force all unwritten data out to the device drivers and, subsequently, to the storage device).
注意，可以使用sync命令将缓冲区缓存中的请求发送到存储媒体（迫使所有未写的数据发送到设备驱动程序，进而发送到存储设备）。 - If rows are accessed randomly, then the smaller page size enables DB2 to make better use of the buffer, because more pages fit into the same storage area.
如果随机访问行，那么较小的页大小让DB2可以更好地利用缓冲区，因为同样的存储区域可以容纳更多页。 - The impact of changing the buffer sizes is to increase storage requirements for the queue manager.
更改缓冲区大小将会增加队列管理器的存储需求。 - Lock application memory sector associative buffer storage
应用程序存储区锁定区段相联缓冲存储器 - It solves the met questions during high-speed data acquisition via circle buffer storage, high-speed disk storage technology, asynchronous read DAQ incidents.
通过采用循环缓冲技术、高速磁盘流技术、异步读取DAQ事件技术解决了数据的高速采集问题。 - The auxiliary storage area of the model includes a fixed length buffer and a queue that is used to storage pairs of nodes those overlap most probably.
改进模型所引入的辅助存储包括：结点对记录队列和定长缓冲区。 - The SDRAM has become the chief choice of the buffer storage because of its high speed, great capacity, and low price; but due to its complex control timing, it cannot directly interface with DSP.
同步动态随机存储器（SDRAM）具有高速，大容量，价格低廉等优点，因而成为缓冲存储器的首选，但是SDRAM控制时序比较复杂，不能与DSP直接接口，这极大地限制了它的广泛应用。